IBM Sets Another Smallness Record with 2nm Chip Blueprints

Okay, now that IBM has revealed its 2nm chip design and process blueprint, what’s next? A virtual chip? Two nanometers is smaller in width than a human DNA molecule. Just how small can development of these things go?

IBM, its head down deep in the science, came out with the world’s first 2nm processor nanosheet on May 6. The specifications will be licensed and put to work by chip fabricators, and we could be seeing these microscopic but powerful IT engines being manufactured by the end of the calendar year or early next year.

This comes about at a key juncture in the processor-making industry. Currently, there’s a high-demand, low-supply market for chips of all kinds–especially high-performance units with energy efficiency built inside. Demand continues to rise, especially in the era of hybrid cloud, AI and the internet of things, where more new products are being designed and built than any other time in IT history. If these things work the way they’re supposed to work, the markets will welcome them with open arms.

IBM said the new chip is designed to achieve 45 percent higher performance and 75 percent lower energy use than today’s most advanced 7nm node chips. Those are substantial performance numbers.

Increasing the number of transistors per chip makes them faster and more efficient, due to the relative nearness to each other on the die.

What the new chips can do

Commercial benefits of these advanced 2nm chips theoretically could include:

• Quadrupling cell phone battery life, only requiring users to charge their devices every four days.
• Slashing the carbon footprint of data centers, which account for 1+ percent of global energy use. Changing all of their servers to 2nm-based processors could potentially reduce that number significantly.
• Substantially speeding up a laptop’s functions, ranging from quicker processing in applications to assisting in language translation more easily, to faster internet access.
• Contributing to faster object detection and reaction time in autonomous vehicles, such as self-driving cars.

50 billion transistors on a fingernail-sized chip

The 2nm design demonstrates the advanced scaling of semiconductors using IBM’s nanosheet technology, the company said. This architecture is an industry first. Developed less than four years after IBM announced its then-milestone 5nm design, this latest breakthrough will allow the 2nm chip to fit up to 50 billion transistors on a chip the size of a fingernail.

More transistors on a chip also mean processor designers have more options to infuse core-level innovations to improve capabilities for leading-edge workloads, such as AI and cloud computing, as well as new pathways for hardware-enforced security and encryption.

IBM is already implementing other innovative core-level enhancements in the latest generations of IBM hardware, such as IBM POWER10 and IBM z15.

IBM’s history of semiconductor design

IBM has had previous semiconductor breakthroughs. These include the first implementation of 7nm and 5nm process technologies, single-cell DRAM, the Dennard Scaling Laws, chemically amplified photoresists, copper interconnect wiring, Silicon on Insulator technology, multi-core microprocessors, High-k gate dielectrics, embedded DRAM and 3D chip stacking.

Of course, not everything in chip design turns out as successful as was planned. For example, three years after their joint product announcement in 2015, Intel and Micron gave up on their co-produced 3D stacking experiment in the 3D Xpoint processor project, in which both companies invested about 10 development years and millions of dollars.

IBM said its first commercialized offering that will include IBM Research 7nm advancements will debut later this year in IBM POWER10-based IBM Power Systems.

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